Bassan, Shahaf; Amir, Guy; Corsi, Davide; Refaeli, Idan; Katz, Guy |
Formally Explaining Neural Networks within Reactive Systems |
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Li, Bohan; Cai, Shaowei |
Local Search For SMT On Linear and Multilinear Real Arithmetic |
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Lam, Kait; Coughlin, Nicholas |
Lift-off: Trustworthy ARMv8 semantics from formal specifications |
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Yu, Emily; Froleyks, Nils; Biere, Armin; Heljanko, Keijo |
Towards Compositional Hardware Model Checking Certification |
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Zhou, Yi; Bosamiya, Jay; Takashima, Yoshiki; Li, Jessica G; Heule, Marijn J.H.; Parno, Bryan |
Mariposa: Measuring SMT Instability in Automated Program Verification |
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Larraz, Daniel; Lorch, Robert M; Yahyazadeh, Moosa; Arif, M. Fareed; Chowdhury, Omar; Tinelli, Cesare |
CRV: An Automated Resiliency Reasoner for System Design Models |
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Mohamed, Abdalrhman M; Reynolds, Andrew; Barrett, Clark; Tinelli, Cesare |
A Procedure for SyGuS Solution Fitting via Matching and Rewrite Rule Discovery |
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Meng, Baoluo; Debnath, Joyanta; Varanasi, Sarat Chandra; Manolios, Emmanuel; Durling, Michael; Paul, Saswata; Prince, Daniel; Alsabbagh, Saif; Haadsma, Richard; McMillan, Craig; Zhang, Chi; Oates, Tim |
Towards a Correct-by-Construction Design of Integrated Modular Avionics |
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Wilson, Amalee D; Noetzli, Andres P; Reynolds, Andrew; Cook, Byron; Tinelli, Cesare; Barrett, Clark |
Partitioning Strategies for Distributed SMT Solving |
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Wu, Haoze; Hahn, Christopher; Lonsing, Florian; Mann, Makai; Ramanujan, Raghuram; Barrett, Clark |
Lightweight Online Learning for Sets of Related Problems in Automated Reasoning |
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Coward, Samuel; Morini, Emiliano; Tan, Bryan; Drane, Theo; Constantinides, George |
Datapath Verification via Word-Level E-Graph Rewriting |
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Dong, Ning; Guanciale, Roberto; Dam, Mads; Lööw, Andreas |
Formal Verification of Correctness and Information Flow Security for an In-Order Pipelined Processor |
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Park, Kanghee; Johnson, Keith J C; D’Antoni, Loris; Reps, Thomas |
Modular System Synthesis |
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Elsaleh, Raya; Katz, Guy |
Delta-Debugging Neural Network Verifiers |
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Zhang, Changjian; Dardik, Ian; Meira-Góes, Rômulo; Garlan, David; Kang, Eunsuk |
Fortis: A Tool for Analysis and Repair of Robust Software Systems |
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Froleyks, Nils; Yu, Emily; Biere, Armin |
BIG Backbones |
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Kiesl-Reiter, Benjamin; Whalen, Michael W |
Proofs for Incremental SAT with Inprocessing |
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Codel, Cayden R; Avigad, Jeremy; Heule, Marijn J.H. |
Verified Encodings for SAT Solvers |
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Tollec, Simon; Asavoae, Mihail; Couroussé, Damien; Heydemann, Karine; Jan, Mathieu |
µArchiFI: Formal Modeling and Verification Strategies for Microarchitetural Fault Injections |
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Marmanis, Iason; Vafeiadis, Viktor |
Optimal Bounded Partial Order Reduction |
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Tafese, Joseph; Gurfinkel, Arie; Garcia-Contreras, Isabel |
Btor2MLIR: A Format for Hardware Verification |
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Taylor, Landon J; Israelsen, Bryant; Zhang, Zhen |
Cycle and Commute: Rare-Event Probability Verification for Chemical Reaction Networks |
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Bernardes Fernandes Ferreira, Nikson; Moscato, Mariano M; Titolo, Laura; Ayala-Rincon, Mauricio |
A provably correct floating-point implementation of Well Clear Avionics Concepts |
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Sakallah, Karem A; Fazekas, Katalin; Goel, Aman |
SAT-Based Quantified Symmetric Minimization of the Reachable States of Distributed Protocols |
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Ryan, Kaki; Sturton, Cynthia |
Countering the Path Explosion Problem in the Symbolic Execution of Hardware Designs |
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Qin, Xin; Hashemi, Navid; Lindemann, Lars; Deshmukh, Jyotirmoy |
Conformance Testing for Stochastic Cyber-Physical Systems |
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Godbole, Adwait; Ye, Leiqi; Manerkar, Yatin A.; Seshia, Sanjit A. |
Modelling and Verification of Security-Oriented Resource Partitioning Schemes |
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Saxena, Manasvi; Song, Shuang; Sha, Lui |
MediK: Towards Safe Guideline-based Clinical Decision Support |
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Thakkar, Arkesh H; D’Souza, Deepak |
Data-Driven Learning of Strong Conjunctive Invariants |
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Bhat, Shreesha G.; Nagar, Kartik |
Automating Cutoff-based Verification of Distributed Protocols |
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Pastva, Samuel; Henzinger, Thomas |
Binary decision diagrams on modern hardware |
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